Chih-Feng Wu, Muh-Tian Shiue, and Chorng-Kuang Wang, “Joint Carrier Synchronization and Equalization Algorithm for Packet-Based OFDM Systems Over the Multipath Fading Channel,” IEEE Transactions on Vehicular Technology, Vol. 59 , No. 1, pp248-260, Jan. 2010
Chao-Shiun Wang, Juin-Wei Huang, Kun-Da Chu, and Chorng-Kuang Wang, “A 60-GHz Phased Array Receiver Front-End in 0.13-um CMOS Technology,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol.56, no.10, 2341-2352, Oct. 2009
Yi Lu, Kuang-Hu Huang, Chorng-Kuang Wang, “A 2.4 GHz CMOS low-IF receiver front-end for WLAN applications,” Analog Integrated Circuits, S 32 (3), 211-217, Sept. 2002
Po-Chiun Huang, Yi-Huei Chen, and Chorng-Kuang Wang, “A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier,” IEEE Journal of Solid-state Circuits, Vol. 36, No. 1, Jan. 2001
Kuang-Hu Huang, Wei-Cheng Wang, Tang-Huei Yang, and Chorng-KuangWang, “A 2-V 7.2 Jitter AM-Suppression CMOS Amplifier using Current-Mode Hybrid Magnitude Control,” IEEE Journal of Solid-state Circuits, Vol.34, No.10, Oct. 1999
Po-Chiun Huang; Chen-Yi Huang; Chorng-Kuang Wang, “A 155-MHz BiCMOS Automatic Gain Control Amplifier,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, pp643-647, 1999
Muh-Tian Shiue, Chorng-Kuang Wang, and Winston I. Way, “A VLSI Architecture Design for Dual-mode QAM and VSB Digital CATV Tranceiver,” IEICE Trans. Communication, Vol. E00-B, No. 12, pp2351-2356, Nov. 1998
Shyh-Jye Jou; Shou-Yang Wu; Chorng-Kuang Wang, “Low-Power Multirate Architecture for IF Digital Frequency Down-Converter,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, pp1487-1494, 1998
Chorng-Kuang Wang; Po-Chiun Huang, “An Automatic Gain Control Architecture for SONET OC-3 VLSI,” IEEE Transactions on Circuits and Systems II: Anal, pp779-783, 1997
Chorng-Kuang Wang; Po-Chiun Huang; Chen-Yi Huang, “A BiCMOS Limiting Amplifier for SONET OC-3,” IEEE Journal of Solid-State Circuits, Vol.31, pp1197-2000, Aug. 1996
W. C. Lin, K. C. Liu, and C. K. Wang, “Differential Matched Filter Architecture for Spread Spectrum Communication Systems,” Electronics Letters, Vol.32, No. 17, pp1539-1540, Aug. 1996
Chorng-Kuang Wang; Po-Chiun Huang; Chen-Yi Huang, “A Fully Differential CMOS Transconductance-Transimpedance Wideband Amplifier,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, pp745-748, 1995
S. P. Shieh, C. K. Wang, R. Castello, and P. R. Gray, “A Scalable Switched-Capacitor Filter Implemented in 1.25um Technology,” IEEE Journal of Solid-State Circuits, Vol. 24, pp174-176, Feb. 1989
C. K. Wang, R. Castello, and P. R. Gray, “A Scalable High Performance Switched-Capacitor Filter,” IEEE Journal of Solid-State Circuits, Vol. SC-21, pp56-64, Feb. 1986
C. K. Wang, R. Castello, and P. R. Gray, “A Scalable High Performance Switched-Capacitor Filter,” IEEE Trans. Circuits and Systems, part-II, CAS-33, pp167-174, Feb. 1986
Conference & proceeding papers:
Hsi-Han Chiang, Fu-Chien Huang, Chao-Shiun Wang, and Chorng-Kuang Wang, “A 63 GHz Low-Noise Active Balun with Broadband Phase-Correction Technique in 90 nm CMOS,” IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2010
Tao-Yao Chang, Chao-Shiun Wang, and Chorng-Kuang Wang, “A 77 GHz Power Amplifier Using Transformer-Based Power Combiner in 90 nm CMOS,” IEEE Custom Integrated Circuits, Sept. 2010
Ming-Yeh Hsu, Chao-Shiun Wang and Chorng-Kuang Wang, “A Low Power High Reliability Dual-Path Noise-Cancelling LNA for WSN Applications,” IEEE Custom Integrated Circuits, Sept. 2010
Wen-Yi Pang, Chao-Shiun Wang, You-Kuang Chang, Nai-Kuan Chou, and Chorng-Kuang Wang, “A 10-bit 500-KS/s Low Power SAR ADC with Splitting Comparator for Bio-Medical Applications,” IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2009
Chao-Shiun Wang, Kun-Da Chu, and Chorng-Kuang Wang, “A 0.13µm CMOS 2.5Gb/s FSK demodulator using injection-locked technique,” IEEE Radio Frequency Integrated Circuits Symposium, Jun. 2009
Fang-Li Yuan, Chin-Hsien Lin, Yi-Hsien Lin, Chih-Feng Wu, and Chorng-Kuang Wang, “A MIMO-OFDM digital baseband receiver design with adaptive equalization technique for IEEE 802.16 WMAN,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2009, Apr. 2009
Chih-Feng Wu, Muh-Tian Shiue, and Chorng-Kuang Wang, “Joint Carrier Synchronization and Equalization Algorithm for OFDM Systems -- Closed-Loop Derivation,” 2009 IEEE 69th Vehicular Technology Conference (VTC 2009-Spring), Apr. 2009
Chih-Hsien Lin, Yi-Hsien Lin, Chih-Feng Wu, Muh-Tian Shiue, and Chorng-Kuang Wang, “Cost efficient FEQ implementation for IEEE 802.16a OFDM transceiver,” IEEE International Symposium on VLSI Design, Automation & Test, Apr. 2009
Kai-Hsiang Chuang, Jyh-Yih Yeh, Chao-Shiun Wang and Chorng-Kuang Wang, “A 300MHz, 48mW Analog Front-end Design for IEEE 802.3an 10GBase-T Ethernet,” IEEE International Symposium on VLSI Design, Automation & Test, 2008
Jia-Lung Cheng, Chao-Shiun Wang, Wei-Chang Li and Chorng-Kuang Wang, “A 1.1-V CMOS Frequency Synthesizer with Pass-Transistor-Logic Prescaler for U-NII Band System,” IEEE International Symposium on VLSI Design, Automation & Test, 2008
Chih-Feng Wu, Muh-Tian Shiue and Chrong-Kuang Wang, “Joint Carrier Synchronization and Equalization for OFDM Systems over Multipath Fading Channel,” 2008 IEEE 68th Vehicular Technology Conference (VTC 2008-Fall), 2008
Shon-Hang Wen, Chao-Shiun Wang, Chorng-Kuang Wang, “A Low power 20GHz 1.5 Gb/s CMOS Injection-Pulling FSK Modulator and Frequency Discriminator for 60GHz Links,” IEEE Custom Integrated Circuits Conference, 2008
Fang-Li Yuan, Yi-Hsien Lin, Chih-Feng Wu, Muh-Tian Shiue and Chorng-Kuang Wang,, “A 256-point Dataflow Scheduling 2x2 MIMO FFT/IFFT Processor for IEEE802.16 WMAN,” IEEE Asian Solid-State Circuits Conference (A-SSCC), 2008
Juin-Wei Huang, Chao-Shiun Wang, Chorng-Kuang Wang, and Shih-Huang Yeh, “Vertical-Ground-Plane Transmission Lines for Miniaturized Silicon-Based MMICs,” IEEE Radio Frequency Integrated Circuits Symposium, 2007
Chao-Shiun Wang, Juin-Wei Huang, Shon-Hang Wen, Shih-Huang Yeh and Chorng-Kuang Wang, “A CMOS RF Front-End with On-Chip Antenna for V-Band Broadband Wireless Communications,” IEEE European Solid-State Circuits Conference, 2007
Chao-Yung Wang, Chao-Shiun Wang, and Chorng-Kuang Wang, “An 18-mW Two-Stage CMOS Transimpedance Amplifier for 10 Gb/s Optical Application,” IEEE Asian Solid-State Circuits Conference, 2007
You-Kuang Chang, Chao-Shiun Wang, and Chorng-Kuang Wang, “A 8-bit 500-KS/s Low Power SAR ADC for Bio-Medical Applications,” IEEE Asian Solid- State Circuits Conference, 2007
Chao-Shiun Wang, and Chorng-Kuang Wang,, “A 3-10 GHz Full-Band Single VCO Agile Switching Frequency Generator for MB-OFDM UWB,” IEEE Asian Solid-State Circuits Conference, 2007
Shon-Hang Wen, Juin-Wei Huang, Chao-Shiun Wang and Chorng-Kuang Wang, “A 60GHz Wide Locking Range CMOS Frequency Divider using Power-Matching Technique,” IEEE Asian Solid-State Circuit Conference (A-SSCC), Hang-Zhou, Nov. 2006
Hua-chin Lee, Chien-chih Lin, and Chorng-kuang Wang, “A 290MHz 50dB Programmable Gain Amplifier for Wideband Communications,” IEEE Asian Solid-State Circuit Conference (A-SSCC), Hang-Zhou, Nov. 2006
Wei-Chang Li, Chao-Shiun Wang, Chorng-Kuang Wang, “A 2.4-GHz/3.5-GHz/5-GHz Multi-Band LNA with Complementary Switched Capacitor Multi-Tap Inductor in 0.18µm CMOS,” IEEE International Symposium on VLSI Design, Automation & Test, Hsinchu, 2006
Chao-Shiun Wang, Chorng-Kuang Wang, “A 90nm CMOS Low Noise Amplifier Using Noise Neutralizing for 3.1-10.6GHz UWB System,” IEEE European Solid-State Circuits Conference, 2006
T. T. Liu, and Chrong-Kuang Wang, “A 0.9mW 0.01-1.4GHz Wideband CMOS Low Noise Amplifier for Low-Band Ultra Wideband Applications,” IEEE Asian Solid-State Circuits Conference (A-SSCC), Page(s): 345-348, Nov. 2005
Chia-Hung Hsu, Chih-Feng Wu and Chrong-Kuang Wang, “FPGA Prototype for WLAN OFDM Baseband with STPE of I/Q Mismatch Self Calibration Algorithm,” IEEE Asian Solid-State Circuits Conference (A-SSCC), Page(s): 509-512, Nov. 2005
Chien-Chih Lin, and Chorng-Kuang Wang, “A 1-V 27mW 10-GHz LC-NOR-Ring QVCO for UWB-OFDM Direct Frequency Synthesizer,” IEEE Asian Solid-State Circuit Conference (A-SSCC), Page(s): 437-440, Nov. 2005
C.S WANG, and Chorng-Kuang Wang, “Sampled-and-Hold Based Automatic Calibration Modulator for WLAN Transmitter,” IEEE Asian Solid-State Circuit Conference (A-SSCC), Page(s): 77-80, Nov. 2005
W.C Li , C.S WANG, Chorng-Kuang Wang, “A Multi-Band CMOS LNA Using Complimentary Switched Capacitor Multi-Tap Inductor for WMAN and WLAN Applications,” IEEJ International Analog VLSI Workshop, Oct. 2005
Chao-Shiun Wang, Jun-Wa Huang, Shon-Hang Wen, Shih-Huang Yeh* and Chorng-Kuang Wang, “A CMOS Direct-Conversion RF Front-End with On-Chip Antenna for 60 GHz Broadband Wireless Communications,” IEEJ International Analog VLSI Workshop, Oct. 2005
Chih-Feng Wu, Muh-Tian Shiue, and Chorng-Kuang Wang, “Design and Analysis of DHT-Based Frequency-Domain Equalizer for DMT Systems,” 13th European Signal Processing Conference, EUSIPCO 2005, Antalya, Turkey, Sept. 2005
Chien-chih Lin and Chorng-Kuang Wang, “Subharmonic Direct Frequency Synthesizer for Mode-1 MB-OFDM UWB System,” Symposium on VLSI Circuits, 2005. Digest of Technical Papers, Page(s):38 - 41, Jun. 2005
Chao-Hsiun Wang, Chorng-Kuang Wang, “A Multi-Band Multi-Standard RF Front-End for IEEE 802.16a and IEEE 802.11a/b/g Applications,” IEEE International Symposium on Circuits and Systems, Page(s):3974 - 3977 Vol. 4, May 2005
Hua-Chin Lee, Chien-Chih Lin, Chia-Hsin Wu, Shen-Iuan Liu, Chorng-Kuang Wang and Hen-Wai Tsao, “A 15mW 69dB 2Gsamples/s CMOS Analog Front-End for Low-Band UWB Applications,” IEEE International Symposium on Circuits and Systems, Page(s):368 - 371 Vol. 1, May 2005
Chien-chih Lin and Chorng-Kuang Wang, “A Semi-Dynamic Regenerative Frequency Divider for Mode-1 MB-OFDM UWB Hopping Carrier Generation,” IEEE ISSCC,2005, San Franscisco, 2005
Chih-Feng Wu, Muh-Tian Shiue and Chorng-Kuang Wang, “On-Lline Step-Size Calculation Using Signal Power Estimation-Tone Grouping for Frequency-Domain Equalizer of DMT-Based Systems,” IEEE APCCAS, pp685-688, 2004
Chia-Huang Fu and Chorng-Kuang Wang, “A 20GHz Wide Locking Range Injection-Locked Divide-by-Two Circuit,” IEEJ International Analog VLSI Workshop, pp201-204, 2004
Fu-Chien Huang, Chih-Chien Hung, Jyh-Yih Yeh, Tai-Cheng Lee, and Chorng-Kuang Wang, “A 125 MHz Analog Equalizer with Baseline Wander Cancellation for 1000BASE-T Receiver Front End,” IEEJ International Analog VLSI Workshop, pp211-214, 2004
Hung-Chieh Tsai, Jyh-Yih Yeh, Wei-Hsuan Tu, Tai-Cheng Lee, Chorng-Kuang Wang, “A 10GBASE-LX4 RECEIVER FRONT END TRANSIMPEDANCE AMPLIFIER AND LIMITING AMPLIFIER,” ISCAS, ppIV - 393-6, 2004
Tsung-Te Liu and Chorng-Kuang Wang, “A 1-4 GHz DLL Based Low-Jitter Multi-Phase Clock Generator for Low-Band Ultra-Wideband Application,” IEEE AP-ASIC, pp330 – 333, 2004
Tsung-Te Liu and Chorng-Kuang Wang, “A 0.8-8 GHz 9.7 mW Analog-Digital Dual-Loop Adaptive-Bandwidth DLL Based Multi-Phase Clock Generator,” European Solid-State Circuits Conference, pp375 – 378, 2004
Ching-Chi Chang, Muh-Tian Shiue, Chorng-Kuang Wang, “A Hardware Efficient 64-QAM Low-IF Transceiver Baseband for Broadband Communications,” Proceedings of the 14th VLSI/CAD Symposium, Hualien, Taiwan, Aug. 2003
Wei-Hsuan Tu, Jyh-Yih Yeh, Hung-Chieh Tsai, Chorng-Kuang Wang, “A Clock and Data Recovery Circuit with Improved Jitter Performance for 10GBase-LX4 Ethernet,” Proceedings of the 14th VLSI/CAD Symposium, Hualien, Taiwan, Aug. 2003
Hung-Chieh Tsai, Jyh-Yih Yeh, Wei-Hsuan Tu, Chorng-Kuang Wang, “3.125Gb/s Limiting Amplifier with Low AM to PM Conversion,” Proceedings of the 14th VLSI/CAD Symposium, Hualien, Taiwan, Aug. 2003
Chien-Chih Lin, Kuang-Hu Huang, Chorng-Kuang Wang, “A 15mW 280MHz 80dB Gain CMOS Limiting/Logarithmic Amplifier With Active Cascode Gain-Enhancement,” 28th European Solid-State Circuits Conference, Italy, Sept. 2002
Hao-Shun Chang, Ching-Chi Chang, Muh-Tian Shiue, and Chorng-Kuang Wang, “A 2V Dual-Loop Mixed-Mode Automatic Gain Control for VDSL System,” IEEJ AVLSIW, Singapore, Sept. 2002
Chia-Hua Chou, Chien-Chih Lin, and Chorng-Kuang Wang, “A Programmable Filter with Self-Tuning for DMT VDSL Receiver,” IEEE AP-ASIC, Taipei, Taiwan, Aug. 2002
Chien-Chih Lin, Muh-Tian Shieu, and Chorng-Kuang Wang, “A Dual-Loop Automatic Gain Control for Infrared Communication System,” IEEE AP-ASIC, Taipei, Taiwan, Aug. 2002
Ching-Chi Chang, Muh-Tian Shieu, and Chorng-Kuang Wang, “A VLSI Architecture of DMT Based Transceiver for VDSL System,” IEEE AP-ASIC, Taipei, Taiwan, Aug. 2002
Keng-Yi Su, Muh-Tian Shieu, and Chorng-Kuang Wang, “All Digital CDMA Upstream Transmitter and Baseband VLSI Design of Head-End Receiver for Upstream Cable Networks,” IEEE AP-ASIC, Taipei, Taiwan, Aug. 2002
Liu Ren-Chieh, Lee Chung-Rung, Wang Huei, Wang Chorng-Kuang, “A 5.8-GHz two-stage high-linearity low-voltage low noise amplifier in a 0.35-μm CMOS technology,” IEEE Radio Frequency Integrated Circuits Symposium, p 221-224, RFIC, Digest of Technical Papers, Jun. 2002
Kuang-Hu Huang, Chien-Chih Lin, Chorng-Kuang Wang, “A 15mW 280MHz CMOS Limiting/Logarithmic Amplifier using Active Cascode Techniques,” Proceedings of the 12th VLSI/CAD Symposium, Hsin-Tsu, Taiwan, Aug. 2001
Kuang-Hu Huang; Chorng-Kuang Wang, “A cost effective binary FSK demodulator for low-IF,” International Symposium on VLSI Technology, Systems, and Applications, Page(s):133 - 136, Apr. 2001
Ching-Chi Chang, Chien-Chih Lin, Muh-Tian Shiue, and Chorng-Kuang Wang, “A Wide Pull-in Range Fast Acquisition Hardware-Sharing Two-Fold Carrier Recovery Loop,” IEEE ISCAS, Sydney, Australia, 2001
Chien-chih Lin, Po-Chiun Huang, Yi-Huei Chen, and Chorng-Kuang Wang, “A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier,” IEEE AP-ASIC, Chiju, Korea, Aug. 2000
Chien-Chih Lin, Yu-Zieh Chang, Muh-Tian Shiue, and Chorng-Kuang Wang, “A Dual-Loop Automatic Gain Control for 10Mbps Infrared Communication System,” Proceedings of the 11th VLSI/CAD Symposium, Ping-Ton, Taiwan, Aug. 2000
Po-Chiun Huang, Yi-Huei Chen, Chorng-Kuang Wang, “A 2-V 10.7MHz CMOS Limiting Amplifier/RSSI,” Proceedings of the 11th VLSI/CAD Symposium, Ping-Ton, Taiwan, Aug. 2000
Wei-Cherng Liao, Jia-Soy CHuang, Muh-Tian Shiue, and Chorng-Kuang Wang, “An FH-SS GFSK Low-IF Receiver for Bluetooth,” Proceedings of the 11th VLSI/CAD Symposium, Ping-Ton, Taiwan, Aug. 2000
Shyh-Hua Yen, and Chorng-Kuang Wang, “A 2V CMOS Programable Pipelined Digital Differential Matched Filter for DS-CDMA System,” IEEE AP-ASIC, Seoul, Korea, Aug. 1999
Kuang-Hu Huang, Muh-Tian Shiue, and Chorng-Kuang Wang, “A 2V CMOS Dual-Bandwidth Fast Acquisition Automatic Gain Control Amplifier for Digital Cable Modem,” IEEE AP-ASIC, Seoul, Korea, Aug. 1999
Yi-Huei Chen; Po-Chiun Huang; Jaw-Juinn Horng; Chorng-Kuang Wang, “A 2-V CMOS 455KHz FM/FSK Demodulator using Feedforward Offset Cancellation Limiting Amplifier,” Proceedings of the 10th VLSI Design/CAD Symposium, Nan-Tou, Taiwan, Aug. 1999
Tang-Hui Tang, Jaw-Shiun Wang, Po-Chiun Huang, and C. K. Wang, “A 2V CMOS Receiver RF Front-End for Personal Handy-Phone System Application,” 10th VLSI Design/CAD Symposium, Nan-Tou, Taiwan, Aug. 1999
Wen-Chi Wu, Y. J. Chan, and C. K. Wang, “An Enhanced Model for Planar Inductors in CMOS Technology,” International Symposium on VLSI Technology System and Application, Taipei, Taiwan, Jun. 1999
Hua-Chin Lee, Chin-Kae Tzou, C. K. Wang, and Viggen Dan, “A Fast-Acquisition Demodulation Scheme for 2.4GHz Wireless DSSS Transceiver VLSI,” International Symposium on VLSI Technology System and Application, Taipei, Taiwan, Jun. 1999
Shyh-Jye, G. H. Kua, Muh-Tian Shiue, Jung-Yu Heh, and C. K. Wang, “VLSI Implementation of Timing Recovery and Carrier Recovery for QAM/VSB Dual Mode,” International Symposium on VLSI Technology System and Application, Taipei, Taiwan, Jun. 1999
Yi Lu, Kuang-Hu Huang, and C. K. Wang, “A 2.4 GHz CMOS Low-IF Receiver,” International Analog VLSI Workshop, Taipei, Taiwan, May 1999
Books:
Min-shueh Yuan and Chorng-Kuang Wang, ““PLL Circuits", The VLSI Handbook,” CRC Press, ISBN 084934199X, Dec. 2006
Min-shueh Yuan and Chorng-Kuang Wang, “"PLL Circuits" Analog Circuits and Devices,” CRC Press, ISBN 0849317363, Mar. 2003
Chorng-Kuang Wang and Min-shueh Yuan, “The Circuits and Filters Handbook,” CRC Press, PLL Circui pages, Dec. 2002
C. C. Su, L. Y. Huang, J. J. Lee, and C. K. Wang, “Method and Circuit for Sampling Timing Recovery,” U.S. Patent No. 6,366,628, Apr. 2002
W. L. Cheung, T. H. Nguyen, and C. K. Wang, “Digital Pes Demodulation for a Disk Drive Servo Control System Using Synchronous Digital Sampling,” U.S. Patent No. 6,324,030, Nov. 2001
C. C. Su, M. H. Huang, and C. K. Wang, “Architecture of Non-Synchronous Open Loop Demodulation Circuit in Pulse Position Modulation,” U.S. Patent No. 6,292,051,, Sept. 2001
W. C. Wang, K. H. Huang, and C. K. Wang, “Pulse Position Modulation Based Transceiver Architecture with Fast Acquisition Slot-Locked-Loop,” U.S. Patent No. 6,219,380, Apr. 2001